PMC-CTR32 Counter / Timer
with Opto-isolated I/O
The PMC-CTR32 is an Opto-isolated I/O PMC mezzanine module providing 8 x 16 bits Counter / Timers. A PLX PCI9030 device controls the PCI bus and a Xilinx SpartanXL is used to provide the on-board functionality. External I/O connections are configured as 24 inputs and 8 outputs and routed to the front panel SCSI-2 style connector and to the P4 connector for rear I/O interfacing.. The opto-coupling provides good isolation between the logic and the I/O and between channels. Programmable debouce and a watchdog are provided on-board.
- 32 bits of opto-isolated I/O 0 to 48Volt.
- 24 input and 8 outputs lines.
- 2kV I/O to logic isolation.
- Input de-bounce period programmable between 2uS and 250uS.
- 8 x 16 Bit Counter / Timers each with:
- External or internal clock.
- External direction control.
- External gate.
- External output for polarity selection.
- Interrupt on rollover.
- Watchdog for output enabling:
The PMC-CTR32 uses a PLX PCI9030 PCI interface to a 16-bit local bus on-board. The general features of the PCI9030 are:
- PCI Local Bus Specification V2.2-compliant 32-bit, 33 MHz Bus Target Interface Device enabling PCI Burst Transfers up to 132 MB/s.
- PCI Bus Power Management Interface Specification V1.1 compliant.
- PCI Local Bus Specification V2.2 Vital Product Data (VPD) configuration support.
- PCI Target Programmable Burst Management.
- PCI Target Read Ahead mode.
- PCI Target Delayed Read mode.
- PCI Target Delayed Write mode.
- Programmable Interrupt Generator/Controller.
- Two programmable FIFOS for zero wait state burst operation.
- Flexible Local Bus provides 32-bit Multiplexed or Non-Multiplexed Protocol for 8, 16, or 32-bit Peripheral and Memory devices.
- Serial EEPROM interface.
- Nine programmable General Purpose I/O (GPIOS).
- Five programmable Local Address spaces.
- Four programmable independent chip selects.
- Programmable Local Bus wait states.
- Programmable Local Read pre-fetch mechanism.
- Local Bus can run asynchronously to the PCI Bus.
- Two programmable Local-to-PCI interrupts.
- Endian Byte Swapping.
The PMC-CTR32 uses a Xilinx SpartanXL FPGA connected to the 16-bit local bus to provide the on-board logic functions as described below.
Counter / Timer Output Register
An 8 bit register containing the levels of the output pins on the logic device.
An 8bit clock register containing the level of the timer / counter clock input pins on the logic device.
An 8 bit register containing the level of the gate input pins on the logic device.
An 8-bit register containing the level of the direction input pins on the logic device.
Gate Override Register
An 8 bit register where each bit is OR'ed with the corresponding gate input pin for the respective counter / timer.
Direction Override Register
An 8 bit register where each bit is OR'ed with the corresponding direction input pin for the respective counter / timer.
An 8 bit register where each bit indicates that the counter / timer output is active.
Clock Source Register
Output Control Register
An 8 bit register where each bit is used to select the polarity of the counter /timer output.
Interrupt Enable Register
An 8 bit register where each bit is used to enable the interrupt for the corresponding counter / timer.
Clock source Register
An 8 bit register where each bit is used to select internal or external clock for the counter / timer source.
An 8 bit register where each bit correspond to a group of 8 I/O bits.
An 8 bit register which contains the low byte of the PCI Subsystem Device ID - used to determine the type of board fitted from the PMC-DIO and PMC-CTR families.
Control and Status Register
A 16 bit register used to control and monitor the status of the following functions:
- Watchdog Interrupt Control
- Global Output Control
- Watchdog Enable Control
- Watchdog Status
- Counter / Timer Clock Selection
- Input De-bounce Period.
Watchdog Trigger Register
An 8 bit register in which bit 0 must be written alternately 0 and 1 within 25% of the watchdog timer period.
Watchdog Timer Register
An 8 bit register defining the watchdog timer period: 125ms, 250ms, 500ms, 1sec or 2 sec.
Watchdog Status Register
An 8 bit register which indicates that the watchdog has timed out.
Counter / Timer Value Register
A 16-bit register for each counter / timer which can be used to set the count value and read to return the current count value.
Counter / Timer Operation
On the rising edge of the Counter / Timer CLOCK the state of the DIRECTION and GATE inputs are latched. The counter is updated dependent on the DIRECTION and GATE values.
The PMC-CTR32 is fitted with a 93CS56 EEPROM which is supplied pre-programmed by BVM. The contents of this EEPROM are read by the PCI9030 on coming out of reset and are used to set up the control registers after reset, configuring the PCI interface configuration, PCI Device/Vendor ID's & various other board specific parameters.
The PMCCTR32 is fitted with a 18V256 EEPROM, which is supplied pre-programmed by BVM. The contents of this EEPROM are read by the SpartanXL FPGA on power up and are used to initialise the logic functions in the FPGA.
PCI9030 PCI Interface
PCI 2.2 compliant 32-bit, 33-MHz Bus Target Interface Device
PCI Target Delayed Read mode disabled
PCI Target Read Ahead mode disabled
PCI Target Delayed Write mode disabled
Programmable Interrupt Generator
Local Bus provides 32-bit non-multiplexed 16-bit peripheral access
Local Bus zero wait state
Programmable Local-to-PCI interrupt
Counter / Timer Clock Register
Counter / Timer Output Register
Counter / Timer Gate Register
Counter / Timer Direction Register
Counter / Timer Status Register
Counter / Timer Output Control Register
Counter / Timer Interrupt Enable Register
Counter / Timer
32.768KHz timer clock
32-bits opto-isolated I/O
I/O direction fixed
global output enable
2kV I/O to logic isolation
1kV I/O to I/O isolation
5mA input current limit
250mA output current limit
Short circuit protection
Counter / Timer Functions
8 x 16-bit counter / timers
External or internal clock input
Internal clock frequency select
External Gate input
External Direction input
External output on count rollover
Interrupt on count rollover
Bus Interface: PCI 2.2 compliant
Bus Width: 32-bit
Bus Speed: 33MHz
Data Transfer: PCI 2.2 Bus Target
Interrupts: PCI INT #A
Memory Address: BIOS assigned
Dimensions: 74.0mm x 149.0mm (single PMC size)
Power: +3.3V 215mA typical +5V 0mA typical, excluding external requirements
Environmental: 0 to 70 ° C, 95% humidity non-condensing (extended range to order)
BVM Limited can be contacted by Telephone +44 (0)1489 780144 Fax
+44 (0)1489 783589